Chipmakers will encounter major challenges before the end of the decade in their quest to achieve stringent emissions goals. Achieving these targets will require a concerted effort from the industry to explore new and innovative methods of reducing their energy consumption and adopting cleaner energy sources.

In light of this, we are working together with Thorsten Greil from the Technical University of Munich, Nilay Shah from Imperial College London, and Hans Ehm from Infineon Technologies on an energy efficiency initiative to explore innovative approaches for reducing the carbon impact of the semiconductor sector. The objective of this undertaking is to make a valuable contribution towards realising a more environmentally-friendly future.

One low-cost opportunity to reduce emissions that does not require drastic capital investment is operational efficiency, where reduction of the energy consumption in production is considered as top priority. Together, we are inviting qualified students from The Technical University of Munich and Imperial College London to participate in the project and complete their master’s thesis on the following topic: Global virtual factory simulation for energy efficiency. Our findings will be presented at the Winter Simulation Conference 2023. 

Project Objective

A hypothesis is that the energy efficiency – and subsequently the gas emissions – of a wafer fab can be reduced through improvements in operational efficiency, such as production scheduling. Previous studies have considered chemical alternatives, where Infineon investigated the use of alternate gases with less impact on the climate. Similarly, potentially significant savings can also be made in smarter and more environmentally friendly daily operational decisions. 

We want to discover what operational decisions could be taken at fab level to reduce CO2 emissions, without drastic investment or damaging productivity. For example, how can we incorporate CO2 emissions targets into production scheduling? And whether or not it's possible to reduce CO2 emissions whilst improving cycle time. 

Procedure

The solution approach to the above objective will be supported by the following methods:

• Familiarisation with semiconductor manufacturing including cleanroom and facility environment characteristics with a focus on energy consumption and operational decisions.

• Literature review in the field of energy efficiency and scheduling to present the current state.
• Embedding energy related aspects in the fab simulator tool developed by Flexciton based on energy emission information provided by Infineon.
• Investigation of smarter coordinated operational decisions in the fab to reduce carbon emission.

Say hello to Jamie, one of Flexciton's frontend developers. From watering his cactus to perfecting the user experience of our application, find out what he does during his day-to-day in this month's edition of The Flex Factor.‍

Tell us what you do at Flexciton?

At Flexciton, I have a few different roles. My main role is as a frontend developer, which means I work on creating and improving the user interface of the app. But I also have other responsibilities - I lead the frontend engineering practice, and I'm in charge of guiding discussions and decisions about the frontend architecture. It keeps me busy, but I enjoy the variety!

What does a typical day look like for you at Flexciton?

A typical day for me at Flexciton starts off with some personal tasks - I check on my trusty cactus (Mr Prickles) and give him some water. After that, I open up my personal Trello board and plan out my day, which usually involves working on engineering tasks or frontend related work.

Next up is the daily stand up meeting, where I update the team on what I've accomplished and what I plan to work on for the rest of the day. Then it's time to dive into work - if I'm working on an engineering task, that usually means writing some code and asking for help from resources like StackOverflow or ChatGPT. I like to listen to some ambient and melodic tunes while I work.

If it's a practice day, I'll probably be working on tickets to address existing tech debt or putting together plans for the UI architecture. Around lunchtime, I take a break and grab some food - on Tuesdays, we have a team lunch that gives us a chance to chat with other members of Flexciton outside of our immediate team. After lunch, it's back to work until it's time to call it a day.

What do you enjoy most about your role?

What I enjoy most about my role at Flexciton is the variety of tasks and responsibilities that come with being a frontend developer and leading the frontend engineering practice. I love delivering features that provide real value to the users of our app, and there's nothing better than seeing someone using a feature I've helped build. The idea of making a user's experience even just a tiny bit better is highly motivating.

On a daily basis, I get to work on both technical and creative aspects of the app - whether it's writing code for engineering tickets, collaborating on designs, or planning out the UI architecture. I find it really satisfying to see the tangible results of my work and how it contributes to the overall success of the company.

Additionally, being part of a team that is collaborative, supportive, and always striving for improvement makes my job even more enjoyable. I appreciate that I have the opportunity to learn from my colleagues and contribute my own ideas to help move the company forward. Overall, the combination of technical challenges, a positive team environment, and the ability to make a real impact on our users is what makes me look forward to coming to work every day.

‍If you could do it all over again, would you pursue your same career?

Absolutely, I would pursue the same career again without hesitation. Before transitioning to frontend development, I worked as an electrician for five years. Although I gained valuable experience and skills during that time, I knew that it wasn't the right long-term career path for me.

Switching to frontend development was a challenging but rewarding decision. I've been able to build upon my previous technical knowledge and apply it in new and exciting ways. I feel incredibly lucky to have found a career that I truly enjoy, and I never take that for granted.

Being a frontend developer allows me to combine my technical skills with my creativity and problem-solving abilities. I find the work to be constantly engaging, and I'm always learning new things. The fact that I'm able to contribute to the success of a company and make a positive impact on its users is incredibly fulfilling.

I know that not everyone has the opportunity to pursue a career they enjoy, so I feel grateful every day for the path that led me to frontend development. Looking back, I can confidently say that I made the right decision, and I'm excited to see where this career will take me in the future.

‍If you could summarise working at Flexciton in 3 words, what would they be?

Rewarding, challenging, fun

Tell us about your best memory at Flexciton?

My first day at Flexciton is definitely one of my fondest memories. Starting a new job can be daunting, but I was immediately struck by the friendly and welcoming atmosphere in the office. My colleagues went out of their way to make me feel comfortable and part of the team from the get-go. I knew from that first day that I had made the right choice in joining this company.

Since then, I've had the opportunity to work on some truly exciting projects and collaborate with some incredibly talented people. Every day presents new challenges and opportunities for growth, and I'm constantly motivated to improve and learn.

But it's not all work and no play at Flexciton. One of the highlights of the year for me is our company trips. After working hard all year, it's a much-needed break to spend some quality time with my colleagues and enjoy some downtime. It's always a great bonding experience, and I come back feeling re-energized and ready to tackle whatever challenges lie ahead.

Overall, I feel incredibly fortunate to be part of such a supportive and dynamic team at Flexciton. From my first day to now, it's been a truly memorable and rewarding journey, and I can't wait to see what the future holds.

‍

One of the consequences of the pandemic has been an incentive to deglobalise, as regions suffered from the issues with supply chains and geopolitical dependencies. Significant delivery issues in the chip industry – and in particular wafer manufacturing – have had a negative impact on the global economy. However, onshoring this high technology industry will also bring its own challenges. Expertise and cost efficiency to name a couple. Zooming in a bit closer on so-called wafer fabs, we can distinguish two types of factories. The legacy and smaller fabs serving niche markets with older technology nodes, and the cutting-edge giga-factories, recently built or in the making. Both types have different problems to tackle, but one key component of their roadmap could be surprisingly similar.

The newest fabs have well integrated automated systems, but operating them efficiently on such a scale is a challenge of its own. The older factories have the downside of being less automated but they realise the need to become more efficient in energy consumption, labour cost and capacity utilisation. In both situations, digital transformation is coming to the rescue. Industry 4.0 is no longer a buzzword, it has become a matter of regional technological sovereignty. 

The fundamental building block of Industry 4.0 is data; an asset which is present in abundance in wafer fabs. So what is preventing these factories from levelling up? The answer is simple, the solution is not: complexity. It’s an inherent part of wafer manufacturing, stemming from; increasingly high numbers of process steps, job shop factory types, re-entrant flows, product diversity, sensitivity to quality issues and so on. 

The problem with complex systems is that there’s so much variability and interaction, it's hard to get actionable insights from data. Instead of accepting the stochastic and complex nature of the fab, factories can better control it by using advanced production scheduling to understand in which order lots get processed, on which tool and – the most important difference when compared with common rules-based approaches – when they get processed. To begin, this can be employed in certain bottleneck areas and then once you do it for the entire factory, you get a holistic picture of what is going to happen. Sounds great, doesn’t it? But how exactly will this benefit your fab? To explain, let’s place production scheduling in a couple of recognisable use cases. 

‍

1. Lot-Tool Assignments

Wafer manufacturing has complicated recipe-tool qualification matrices within a group of tools that perform similar processes. The weaker tools can process fewer recipes than the stronger ones. We want to avoid stronger tools “stealing” lots away from the weaker tools, because it leaves fewer lots for the weaker tools to process, therefore wasting capacity. The same is true for faster and slower tools: while faster tools are preferred, pushing all the WIP through the faster tools leaves the slower tools under utilised. Advanced schedulers allow for better anticipation of incoming WIP and superior use of available capacity for weak and slow tools. The bigger and more complex the matrix grows, the harder it is to find the optimal processing of WIP. On top of the scheduling itself, mathematical programming helps to optimize lot-to-tool assignments over time. This results in a capacity booster, similar to putting a turbocharger on an engine: it’s the same engine, but with more power.

2. Reducing Timelink Violations

Process steps with timelinks are common in wafer manufacturing to control the maximum amount of time a wafer spends between two or more process steps. If a timelink is violated, the wafer requires rework – or worse still, scrappage. A system that avoids timelink violations requires the ability to intelligently plan into the future. And that’s exactly what an advanced scheduler does. It has been proven to drastically reduce timelink violations, even in the most complex of scenarios. 

3. Improving Batching Efficiency 

Batching is a complex decision making process since it involves an estimate of lot arrivals and how waiting longer trades off with running smaller batches. Predicting lot arrivals is difficult in such a complex environment, and trading off wait time against batch efficiency is even harder because the costs and gains are not always clear. Determining and automating this process is well within an advanced scheduler’s remit. Once the algorithm is tuned, it makes the most efficient decision, and perhaps even more importantly: it generates consistent output. 

4. Optimizing Changeover Decisions 

Another use case related to the problem of lot arrivals is the problem of changeover decisions. One toolset with different machine setups can serve multiple different toolsets down the line. A bit like a waiter in a restaurant serving multiple tables. Waiters have to make sure no table is without food or drink, and to do that, they visit the tables regularly to ask for any orders. But for machines, you can’t switch the setup too often because it only increases non-productive time. Preferably, you also plan setup changeovers at a time when planned or predicted downtime for the machine occurs, to reduce downtime variability. To put it simply, it’s a decision on when to switch over from the type A process to the type B process on a tool. An advanced scheduler can solve that equation, finding the optimal point in time. Schedulers are better at this than human reasoning or rule-based logic, as solving to a time dimension is what they are designed for.

5. Flow Control and Line Balance

Line balancing is – even for experienced manufacturing engineers – difficult to grasp. One can intuitively understand what it means, but how do you define “balanced” in the first place? Even if you can, it is absolutely beyond the capabilities of a human brain to manually and continuously make decisions that control it. And once it’s out of balance, to recover it. Again, considering the time dimension is a crucial aspect of what advanced schedulers offer, which enables them to recover faster from unforeseen circumstances and maintain better risk-control for generating continuous output.

6. Operator Task Lists

As opposed to dispatch lists that only tell the order in which to process lots, advanced schedulers can also tell when a lot is supposed to start and finish processing on a tool. Combine that information with which operators are serving which tools, and you can move away from tool-centric dispatch lists towards operator-centric task lists. With a handheld device, that could even allow you to send push notifications when urgent intervention is needed. It can reduce idle time on tools that have no available operator. Even more so, it can allow for an entire rethink of the workflows operators are used to. 

‍

‍

So far in this blog, we’ve focused on scheduling use cases where lots are scheduled on tools, leading to higher throughput on tools, toolsets or the entire factory. All these use cases can also be addressed by improving some rule-based dispatching strategies, but what advanced scheduling offers is the ability to optimize for future decisions rather than just real-time. With that comes better visibility on what will happen in the factory, and it also leaves opportunities for re-organising workflow and freeing up resources. In part 2 of this blog, we’ll begin to look at the future and what could happen when we integrate even further. Enter, Industry 5.0. 

Author: Ben Van Damme, Industrial Engineer and Business Consultant

‍

Part 2 is now live. Click to read.

‍

‍

‍Timelink constraints are one of the most complex issues to handle in fab scheduling. They define the maximum allowed time between steps in the production of a wafer. Correct scheduling of timelinks is critical to helping minimise the risks of oxidation or contamination. This can happen when a wafer is queuing outside of a tool for too long, resulting in scrappage or rework that damages profitability. Renesas Electronics asked Flexciton to see if its intelligent scheduling software could improve this aspect of scheduling in the diffusion area of its wafer fab.
‍

What makes timelink constraints very hard to schedule is their interdependence. For example, by moving from step one to step two, the wafer enters the first timelink. When moving from step two, the wafer enters a second timelink which lasts until step 4. However, there can also be a third timelink constraint – known as a nested timelink – between step three and step four which overlaps the second timelink constraint (see Fig. 1). Therefore, step three has to be scheduled in a way that allows for both the second and third timelink constraints to be adhered. This example discussed is just for a few steps but, in reality, there could be hundreds of steps and many overlapping time constraints that need to be continually considered. This creates one of the most complex scheduling problems seen in a wafer fab, and any violation of the timelinks has a negative financial impact. 

The most commonly used scheduling approach is based on heuristics, using a set of if-then operational rules that have been manually programmed and require constant maintenance. This is a relatively simplistic methodology that has hardly changed over the past two decades and thus cannot effectively solve today’s much more challenging scheduling problems. In modern day fabs, very complex, multi-dimensional problems are common on a daily basis and existing heuristic approaches don’t have the built-in intelligence to look ahead to future steps. 

Flexciton’s next-gen scheduling software is the only solution on the market that is able to do this. It pairs powerful mathematical optimisation technology with smart decomposition techniques to work out solutions with complete autonomy. It has the ability to generate an optimised production schedule within a few minutes by searching through billions of scenarios to select the best possible one. Importantly, its intelligent algorithms consider the knock-on effects that one change can have against all the other constraints in the fab – including timelinks. This repeating iterative process ensures that it is continually updating the schedule to allow for any changes in fab conditions or business objectives.

The software was run in a simulation environment that replicated the way that Flexciton’s scheduler would have run live at the Renesas fab. The results showed that a significant improvement in reducing timelink violations of 29% could be achieved.  Additional improvements would be possible of a 22% reduction in the number of batches and an 11% reduction in queue time despite these two KPIs being conflicting (see Fig. 2). This is because decreasing the number of batches naturally means increasing the number of wafers in each batch, but this increases the queue times for each batch as operators wait for new wafers to arrive at the tool before processing them together. 

Currently, most fabs have no knowledge of the arrival times for future lots so operators can sometimes wait unnecessarily to maximise a batch size, causing more wafers to queue and damaging productivity. Uniquely, the Flexciton scheduler can see how lots are moving in time and can thus optimise the trade-off between number of batches and queue time to achieve the impressive gains seen on these conflicted KPIs.  

Renesas were impressed with the simulation figures. Jay Maguire, Engineer at Renesas, commented, “Flexciton was able to show us several specific decisions we could have done differently to improve batching and cycle time. We are pursuing a live trial of the Flexciton software.”

‍

Jamie Potter, Flexciton’s co-founder and CEO, explained, “The key differentiator of our approach is that our software has the intelligence to predict what may happen in the future based on the current state of a fab (or WIP in a fab). It searches for the best solution amongst billions of possibilities to continuously keep finding the optimal schedule that meets the KPIs to maximise a fab’s productivity and profitability. Humans and heuristics just can’t do that.” 

‍

The big theme at this year’s SEMI Industry Strategy Symposium (ISS) conference was ‘How does Europe fulfil its ambition by 2030?’. It involves an ambitious target of reaching a 20% share of the global semiconductor market by 2030 whilst having a more resilient industry ecosystem. This is a huge challenge, especially when one considers that the global semiconductor market is forecasted to reach $1tn by 2030. A 20% share of this would mean $200bn in just seven years. For perspective, the global market figure currently sits at $600bn which means Europe’s present-day 8% share is around $48bn. Breaking it down like this reveals the magnitude of the challenge; Europe must increase its share of the market by more than quadruple as the size of the pie increases along the way. Looking solely at Europe’s rate of growth in the market over recent years compared with the rest of the world, I can tell you that their target is infeasible. But before we conclude, there are several aspects to consider. 

First, what is going to drive this extraordinary growth? Second, why has the EU – and indeed the US which currently claims 10% of global semiconductor manufacture – set these targets? And finally, what is being planned to achieve them. 

1. Semiconductors are a major driving force in the global economy and the EU clearly recognises this, but perhaps not to the full extent. Almost every modern innovation utilises electronics in some form or another, with the obvious mega trends over the past few years being computers and smartphones. Looking forward, applications that are likely to drive demand further include smart mobility, 5G, AI, IoT, quantum computers, 6G and so on. All of them need increasing amounts of leading-edge chips to handle everything from data capture to cloud processing in order to enable devices and systems to make smarter decisions.
   
   
2. For years we have been enjoying a tightly integrated, global supply chain with wafers and chips crisscrossing the globe as the journey from silicon wafer to packaging to test is done in stages in centres of speciality in different countries.
   
   Covid and the ongoing geopolitical tensions between the US and China mean that this model is being redefined to be more robust. The ideal solution is to onshore all stages of the manufacturing process, i.e., keeping it all within US borders or within EU countries. Thus, these targets don’t intend to take a larger share of the global manufacturing pie. Instead, they aim to increase the amount of semiconductors manufactured that aren’t sent overseas to provide resilience against disruptions to the supply chain of these devices, which are essentials for a healthy economy. China is already on their way there. They currently make 16% of their chips onshore, with ambitions to increase this to 70% in the future – highlighting massive potential growth in this market.
   
   
3. Semiconductor manufacturing requires wafer fabs. The vast majority of fabs today are in Asia, with big players such as TSMC, Samsung and UMC. The challenge with these ambitious targets is that building a new state-of-the-art fab for today’s advanced nodes takes billions of dollars, requires a skilled labour force and takes several years to build once planning permission is granted. And then there are all other stages of packaging and test facilities to be built from scratch and staffed. The skilled labour needed to manage this doesn’t currently exist in the EU so it’s clear to see how setting up totally onshore manufacturing capabilities will take considerable time, money and expertise. 
   ‍

Expertise can be fast tracked by partnering with existing fab companies; such as TSMC discussing building new fabs in the US and Germany. But naturally, they require government grants from the funds being created to boost the semiconductor manufacturing industries. It’s worth comparing how much each area is allocating for this. South Korea’s figure is $450bn, the US is $233bn, and China is investing $200bn. With these sizable sums already formally approved by the relevant authorities, fab construction in these nations is already starting. 

The EU, on the other hand, is only planning to invest a comparatively tiny $43bn.

This figure is nowhere near enough to quadruple its current semiconductor manufacturing capabilities. In fact, Kurt Sievers, CEO of NXP, estimated that a more realistic figure to achieve a 20% market share would likely be over $500bn. And moreover, this has not yet been passed in parliament, so the EU is already behind on the timeline to achieve its target compared with the other market players. As for the UK, the figure has not been announced but is rumoured to be around $1bn – which is not enough to fund just one new fab at an advanced node. 

It’s important that SEMI is driving this discussion around the EU Chips Act as government funding is a critical driver for the region's growth within the global semiconductor market. But it’s not enough. As an industry, we need to take stronger action and challenge the decisions being made by the EU and the UK. They require the expertise of industry leaders to understand the full importance of microelectronics for the economy, without it I believe the money they invest will be fruitless. 

As regular readers know, our software can make existing and new build fabs smarter and substantially more productive, but in order to hit the EU’s extraordinarily ambitious targets, more funding and strategic partnerships must be considered. I suspect that one solution will entail a close relationship between the EU and the US to create a US/EU-based supply chain model with both regions working together to share their centres of excellence to create a complete, self-contained system. Even if the ambitious targets are not met, working on de-integrating the supply chain with onshoring will provide security for the electronics that underpin today’s successful economies. 

‍

Author: Jamie Potter, CEO and Co-founder of Flexciton

Photo Credit: SEMI

‍

This article draws from the contents of a paper presented at Winter Simulation Conference 2022, titled: “Fab-Wide Scheduling of Semiconductor Plants: A Large-Scale Industrial Deployment Case Study”.

An Introduction to Fab-Wide Scheduling

The semiconductor industry is one of the largest and most complex industries in the world. The critical factors in semiconductor manufacturing are the ability to rapidly develop and test novel technologies, improve manufacturing processes to reduce rework and waste, as well as meet production targets in terms of prescribed volumes and due dates. In this context, high quality scheduling is of paramount importance.

Due to the long cycle times, where a wafer is processed over a span of months, decision-making in semiconductor fabrication plants (fabs) is typically framed as a two-level problem. On one hand, global scheduling (or fab-wide) is tasked with the strategic management of factory assets while considering all work-in-progress, incoming and outgoing flows across the fab, expected resource availability and other constraints. On the other hand, local (or toolset-level) scheduling focuses on the operation of individual work centres. It is typically tasked with identifying the best immediate dispatch decisions i.e. which jobs waiting for dispatch should be assigned to which available machine.

Most development efforts to date have focused on the shorter time frame dispatch decisions i.e. local scheduling. This is a more manageable problem since there is little look-ahead and the scope is limited to a single or a few toolsets. Despite numerous research efforts, to date there has not been a published case study of a fab-wide scheduler successfully deployed in a large semiconductor manufacturing facility. Nevertheless, the potential for improvement at the fab-wide level is tremendous; there are numerous opportunities to improve throughout and have a step change in performance. For example:

• Bottlenecks occur due to repetition of process loops, high-cost machines with low capacity, and other physical or operational constraints. To manage them, a strategic approach is needed that looks at the bigger picture and avoids early dispatch of wafers that will end up in a bottleneck area. 
• WIP flow control mechanisms (kanbans) are important for quality control but can block high-priority wafers. Fab-wide scheduling can greatly improve this aspect of operation. 
• Timelinks (also known as timeloop, time lag, or qtime constraints) are challenging because they define the minimum or maximum amount of time between two or more consecutive process steps, leading to a conundrum of keeping downstream machines idle or not. Fab-wide scheduling can greatly assist by accurately predicting arrival times and deciding when to trigger timelinked lots.

Methodology

The scheduling framework proposed in this blog is hierarchical and consists of two main components which run independently and at different frequencies — the Toolset Scheduler (TS) and Fab-Wide Scheduler (FWS). 

The Toolset Scheduler considers the currently in-process and/or upcoming process step of all wafers in the cluster.

FWS takes a view of the entire fab at once and considers multiple future steps for each wafer. It focuses on improving schedule quality by considering the flow of wafers through the fab, something the toolset scheduler cannot do due to its singlestep, toolset-level nature. The main purpose is to redirect flow through the fab and thereby improve flow linearity, reduce bottlenecks, improve WIP flow control management, and reduce timelink violations. Our FWS approach achieves this by predicting wait/cycle times for multiple future steps, analysing those predicted wait/cycle times with respect to the different areas of potential improvement, and re-prioritising wafer steps in a way that guarantees improved (weighted) cycle times. In brief, FWS combines two main elements: (i) an operational module that captures in full detail all relevant constraints e.g. detailed process time modelling, machine maintenance, shift changes, dynamic batching constraints, kanbans etc. (ii) a search module that identifies beneficial priority changes given the evolving fab conditions and state features.

FWS communicates with the toolset schedulers via priority weights (and some other predicted timing information) for individual steps of a wafer, as shown in Figure 2. An advantage of our approach is that, while FWS always schedules all tools in the fab, users can specify which toolsets are subject to guidance; FWS adjusts its search accordingly. This is particularly useful for gradually rolling out FWS in a fab and evaluating its impact. In addition, the guidance strength is controllable - although full guidance is the optimal choice, tuning down guidance allows for a more gradual deployment.

Seagate Deployment

Seagate is a world leader in data storage technology, with more than 40% share of the global Hard Disk Drive (HDD) market. The Springtown facility in Northern Ireland produces around 25% of the total global demand for recording heads, the critical component in a HDD. Flexciton’s FWS / TS scheduling system was trialled in Seagate Springtown between March-May 2022. After successful testing, the system has been operational 24/7 since June 2022; a timeline is shown in Figure 3.

It is important to note that deploying and testing a novel piece of technology in a large factory that runs around the clock presents many practical challenges to be overcome:

• Controllability (scope): important to ensure that the new development is deployed in a controlled manner. The FWS-TS guidance scheme allows for localised trials, where focus can be placed on problematic areas and gradually increase scope.
• Controllability (magnitude): it is useful to only focus on cases with obvious merit first. This is achieved by controlling guidance strength. 
• Explainability: important to be able to detect and reason about the changes. This is achieved by a combination of UI features and support tools which have been designed to give operators and managers situational awareness.
  ‍

Results and Learnings

Quantifying the benefit of an alternative scheduling approach remains a challenging task. When deployed in a real plant, traditional A/B testing between pre and post-deployment suffer from (i) dynamic fab conditions (ii) an ever-changing product mix and (iii) evolving capabilities of the fab e.g. increased/decreased labour capacity and new tool commissioning/decommissioning.

As such, it was decided to look at the impact from different angles - a statistically significant impact would be expected to result in a substantial shift in numerous business  processes and metrics. In particular, three different aspects were examined.

• Deep dives on specific toolsets and metrics.
• Comparison against internal simulation and planning tools. 
• Observing the impact on manual interventions.
  ‍

Notably, all three approaches indicated a change in fab performance between pre and post-deployment; more details will be shared in future articles. In the Winter Sim Conference paper presented in December 2022, we focused on the latter point; A proxy we can use for this benefit is the volume of ad hoc control flow rules activated/deactivated in the fab. Every day, specialists have to define numerous, in some cases even hundreds, of ad hoc control flow rules to better manage operations given the prevalent conditions. For example, setting a ”hard down” rule, where lots are manually placed on hold so as not to continue to a downstream bottleneck. In Figure 5, we show the number of ad hoc operational rules implemented in the Seagate Springtown fab between weeks 2 and 26 of the year 2022 (i.e. from early January until late June). As can be seen in the final weeks, the number of ad hoc rule transactions averaged less than 150 per week, a decrease of over 300% compared to the pre-deployment period. This is strong evidence that FWS deployment reduced massively manual interventions required to effectively control flows within the fab.

Conclusions

The main takeaway of the Winter Sim paper is that the increased horizon look-ahead and global nature of FWS presents numerous opportunities for a step change in factory KPIs. The Flexciton FWS was successfully trialled at Seagate Springtown over 3 months in 2022 and has been fully enabled across the fab since June 2022. It resulted in a radical decrease of interventions previously used to manually control wafer flows. Further analysis suggests that Flexciton’s TS and FWS schedulers have achieved substantial improvements in throughput and cycle times.

‍

Author: Ioannis Konstantelos, Principal Engineer