A Multi-objective Parallel Batch Scheduling Strategy for Wafer Fabs with Timelink Constraints: An Industrial Application in a Renesas Fab
Authors:
Ruaridh Williamson, Semya Elaoud, Ioannis Konstantelos, Jay Maguire, and Dennis Xenos.
Abstract:
This work examines the scheduling of a Renesas semiconductor wafer fabrication plant modelled as a complex constrained flexible job-shop problem. We model the clean and diffusion furnace area with batch scheduling where different batches of jobs have different operating costs and consecutive steps of a job are constrained with timelinks (Timelinks mainly define the maximum amount of time that cane lapse between two or more consecutive process steps of a lot to prevent oxidation and contamination). The model also involves other process aspects such as flexible tool downtime (i.e. a maintenance or a downtime period can start within a window rather than having a fixed start time), incompatible job families, different job sizes, and parallel machines. We present a hybrid two-stage solution strategy, combining an advanced decomposition strategy for Mixed Integer Linear Programming (MILP) models and heuristics. This solution strategy is then benchmarked by minimizing the total weighted batching cost, queuing time, and the number of violations of timelink constraints. Results are compared against those that the wafer fab actually incurred over a historical period of running its dispatching system built on rule-based heuristics. We also detail the simulation methodology used to evaluate the quality of the solution strategy under uncertainty. The comparison of this work’s schedules evaluated under uncertainty against factory schedules when solving large industrial instances shows the significant improvements that our solution can bring.
Keywords:
semiconductor manufacturing, job shop scheduling, MILP, timelink constraints, decomposition techniques, simulation-based performance evaluation
This exclusive webinar assembled senior leaders from both front-end fabs and leading solution providers to explore how the semiconductor industry can utilize smart technologies to navigate current and future challenges, as well as the obstacles to adoption. You can now watch the recording on-demand.
In this white paper, industrial engineers, production controllers, Fab managers, and all those involved in scheduling will learn some of the key benefits of Autonomous Scheduling Technology.
This technical publication from ASMC 2023 focuses on the practical aspects of deploying a novel solution in a critical production environment.
The first published case study of a successful fab-wide scheduling deployment in a large-scale semiconductor wafer fab.
An in-depth look at how our two-step scheduling approach can be used to manage timelink contraints and batch size to boost fab efficiency.
Discover how Renesas Electronics and Seagate Technology harnessed autonomous scheduling to tackle the complex challenge of efficient batching.
Learn how we applied multi-objective optimization to the diffusion area at Renesas Electronics to manage three conflicting KPIs.
Recap on the first of two presentations from SEMICON Europa 2022 – featuring case study results from three different wafer fabs, including Renesas and Seagate.
This technical paper provides a comprehensive overview of results from benchmark studies performed for Seagate Technology, where our solution was applied to metrology toolset scheduling.
Our white paper details a new approach to wafer fab scheduling. A novel hybrid model that delivers optimized schedules in a matter of minutes to help fabs cut costs and increase efficiency.
Discover how we helped a highly-utilised Seagate Technology wafer fab reduce cycle time and boost efficiency by applying our next-generation production scheduling solution.
Learn how applying multi-objective optimization helped to increase throughput whilst reducing reticle moves and queue time.